概述
GD32F130产品主频高达48MHz，支持高达64KB Flash和8KB SARM �；辜闪� USART、I2C、SPI 、ADC以及其他数字和模拟外设资源 。
GD32F130 产品系列提供 TSSOP20、QFN28、QFN32、LQFP32、LQFP48 和 LQFP64 封装选项 。
产品选择器
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16条结果
加载中
|
Part No.
|
Core
|
Series
|
Package
TSSOP20
QFN32
QFN28
LQFP64
LQFP48
LQFP32
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Max Speed (MHz)
|
Flash (Bytes)
16K
32K
64K
|
SRAM (Bytes)
4K
8K
|
I/O
up to 55
up to 39
up to 27
up to 23
up to 15
|
GPTM (32bit)
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GPTM (16bit)
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Advanced TM (16bit)
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HRTM
|
Basic TM (64bit)
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Basic TM (32bit)
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Basic TM (16bit)
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LPTM (32bit)
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LPTM (16bit)
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SysTick (64bit)
|
SysTick (24bit)
|
WDG
|
RTC
|
USART+UART
1+0
2+0
|
LPUART
|
I2C
|
QSPI
|
SPI
|
I2S
|
CAN 2.0B
|
USB 2.0
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Ethernet
|
SDIO
|
EtherCAT Slave Controller
|
MFCOM
|
LIN
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LCD-TFT
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Segment LCD
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Camera
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IPA
|
SAI
|
TMU
|
EXMC
|
CEC
|
14bit ADC Units (CHs)
|
12bit ADC Units (CHs)
1(9)
1(16)
1(10)
|
12bit DAC Units
|
Comp
|
IEEE 802.11
|
Bluetooth
|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Cortex?-M3 | GD32F130 | TSSOP20 | 48 | 16K | 4K | up to 15 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 1+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(9) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | TSSOP20 | 48 | 32K | 4K | up to 15 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(9) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | TSSOP20 | 48 | 64K | 8K | up to 15 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(9) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | QFN28 | 48 | 16K | 4K | up to 23 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 1+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | QFN28 | 48 | 32K | 4K | up to 23 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | QFN28 | 48 | 64K | 8K | up to 23 | 1 | 5 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | LQFP32 | 48 | 16K | 4K | up to 27 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 1+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | LQFP32 | 48 | 32K | 4K | up to 27 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | LQFP32 | 48 | 64K | 8K | up to 27 | 1 | 5 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | QFN32 | 48 | 16K | 4K | up to 27 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 1+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | QFN32 | 48 | 32K | 4K | up to 27 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | QFN32 | 48 | 64K | 8K | up to 27 | 1 | 5 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | LQFP48 | 48 | 16K | 4K | up to 39 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 1+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | LQFP48 | 48 | 32K | 4K | up to 39 | 1 | 4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | LQFP48 | 48 | 64K | 8K | up to 39 | 1 | 5 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(10) | 0 | 0 | 0 | 0 | |
| Cortex?-M3 | GD32F130 | LQFP64 | 48 | 64K | 8K | up to 55 | 1 | 5 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1(16) | 0 | 0 | 0 | 0 |
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宣布时间
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2024-07-11
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2023-08-28
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2023-08-28
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2024-12-20
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2023-08-28
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2024-06-04
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2024-12-20
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-04-21
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2022-04-21
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2022-04-21
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